[PATCH] D104070: [AArch64][GlobalISel] Fix incorrectly generating uxtw/sxtw for addressing modes.
Jessica Paquette via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 10 16:37:20 PDT 2021
paquette accepted this revision.
paquette added a comment.
This revision is now accepted and ready to land.
Oh rad
LGTM
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D104070/new/
https://reviews.llvm.org/D104070
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