[PATCH] D104070: [AArch64][GlobalISel] Fix incorrectly generating uxtw/sxtw for addressing modes.

[Amara Emerson via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG670edf3ee004: [AArch64][GlobalISel] Fix incorrectly generating uxtw/sxtw for addressing modes. (authored by aemerson).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104070/new/

https://reviews.llvm.org/D104070

Files:
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/select-arith-extended-reg.mir

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