[PATCH] D101469: [RISCV] Enable interleaved vectorization for RVV

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 8 11:57:19 PDT 2021


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h:173
+
+  bool enableInterleavedAccessVectorization() { return true; }
+  unsigned getMaxInterleaveFactor(unsigned VF) {
----------------
craig.topper wrote:
> I think these are two different features.
> 
> enableInterleavedAccessVectorization is for memory accesses that are interlaved.
> 
> getMaxInterleaveFactor controls loop unrolling in the vectorizer.
> 
> Which feature were you trying to enable?
I think enableInterleavedAccessVectorization reads extra data and uses shuffles to extract the elements  that are needed.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101469/new/

https://reviews.llvm.org/D101469



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