[PATCH] D101469: [RISCV] Enable interleaved vectorization for RVV

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h:173
+
+  bool enableInterleavedAccessVectorization() { return true; }
+  unsigned getMaxInterleaveFactor(unsigned VF) {
----------------
I think these are two different features.

enableInterleavedAccessVectorization is for memory accesses that are interlaved.

getMaxInterleaveFactor controls loop unrolling in the vectorizer.

Which feature were you trying to enable?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101469/new/

https://reviews.llvm.org/D101469