[PATCH] D103280: [SDAG] try harder to fold casts into vector compare

[Sanjay Patel via Phabricator via llvm-commits]

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sext (vsetcc X, Y) --> vsetcc (zext X), (zext Y) -- (when the zexts are free and a bunch of other conditions)
We have a couple of similar folds to this already for vector selects, but this pattern slips through because it is only a setcc.

The tests are based on the motivating case from:
https://llvm.org/PR50055
...but we need extra logic to get that example, so I've left that as a TODO for now.


https://reviews.llvm.org/D103280

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/X86/sext-vsetcc.ll

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