[PATCH] D102854: [RISCV][test] Add new tests of or/xor in the zbs extension

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 20 16:57:56 PDT 2021


craig.topper added a comment.

Did you mean to replace the previous patch with new tests?



================
Comment at: llvm/test/CodeGen/RISCV/rv32zbs.ll:801
 
+; This should not be optimized since bit 12 of 6145 is set.
+define i32 @xor_i32_6145(i32 %a) nounwind {
----------------
benshi001 wrote:
> jrtc27 wrote:
> > Everything should always be optimised, but you mean a specific optimisation doesn't apply
> This patch will show how
> ```
> lui r1, xxx
> addi r1, r1, yyy
> or r0, r0, r1
> ```
> 
> will be optimized to
> ```
> ori r0, r0, zzz
> bseti r0, 11
> bseti r0, hi
> ```
> 
> An extra register is saved.
I think @jrtc27 means the comment should be understandable by someone in the future without needing to know about a specific patch/commit.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102854/new/

https://reviews.llvm.org/D102854



More information about the llvm-commits mailing list