[llvm] 472f856 - [AMDGPU] Tweak VOP3_INTERP16 profile

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2021-05-17T15:28:00+01:00
New Revision: 472f856714fb1687b0727b3013f5d071d8fa86ae

URL: https://github.com/llvm/llvm-project/commit/472f856714fb1687b0727b3013f5d071d8fa86ae
DIFF: https://github.com/llvm/llvm-project/commit/472f856714fb1687b0727b3013f5d071d8fa86ae.diff

LOG: [AMDGPU] Tweak VOP3_INTERP16 profile

Set the output register class based on the output type, instead of
hard-coding VGPR_32. I think this is more correct. It doesn't make any
difference at the moment because we use the same class for 16- and
32-bit results, but it might in future if we make more use of true
16-bit register classes.

Differential Revision: https://reviews.llvm.org/D102622

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/VOP3Instructions.td

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
index fb2fcad0f957..222ce2f780f4 100644
--- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
@@ -264,7 +264,7 @@ class VOP3_INTERP16 <list<ValueType> ArgVT> : VOPProfile<ArgVT> {
   let HasOMod = !ne(DstVT.Value, f16.Value);
   let HasHigh = 1;
 
-  let Outs64 = (outs VGPR_32:$vdst);
+  let Outs64 = (outs DstRC.RegClass:$vdst);
   let Ins64 = getInterp16Ins<HasSrc2, HasOMod, Src0Mod, Src2Mod>.ret;
   let Asm64 = getInterp16Asm<HasSrc2, HasOMod>.ret;
 }