[PATCH] D102493: [RISCV] Expand unaligned fixed-length vector memory accesses

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck updated this revision to Diff 345877.
frasercrmck added a comment.

- rebase
- avoid implicit TypeSize -> unsigned cast
- add explicit costmodel tests for unaligned


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102493/new/

https://reviews.llvm.org/D102493

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
  llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
  llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D102493.345877.patch
Type: text/x-patch
Size: 58535 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210517/11aeebc5/attachment.bin>