[PATCH] D100788: [SystemZ] Support i128 inline asm operands

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa marked an inline comment as done.
jonpa added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:8568
+          const TargetRegisterClass *RC = nullptr;
+          if (RegVT == MVT::Untyped) {
+            const MachineFunction &MF = DAG.getMachineFunction();
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uweigand wrote:
> Instead of recomputing the RC here, can't we get it from the flag word of the matching operand, e.g. using `hasRegClassConstraint(OpFlag, RCID)`?  This would match the way we get the number of registers from the flag word instead of recomputing it as well.
No - the matching operand may be a specific physreg in which case there is no register class specified (e.g. SystemZ/asm-17.ll).



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https://reviews.llvm.org/D100788