[PATCH] D100788: [SystemZ] Support i128 inline asm operands
Ulrich Weigand via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 5 03:17:04 PDT 2021
uweigand added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:8568
+ const TargetRegisterClass *RC = nullptr;
+ if (RegVT == MVT::Untyped) {
+ const MachineFunction &MF = DAG.getMachineFunction();
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Instead of recomputing the RC here, can't we get it from the flag word of the matching operand, e.g. using `hasRegClassConstraint(OpFlag, RCID)`? This would match the way we get the number of registers from the flag word instead of recomputing it as well.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100788/new/
https://reviews.llvm.org/D100788
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