[PATCH] D100430: [AMDGPU][GlobalISel] Widen 1 and 2 byte scalar loads

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir:289
+    %1:_(s32) = G_ZEXTLOAD %0 :: (invariant load 2, align 2, addrspace 4 )
+...
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Maybe add a negative case for the memory not being invariant


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100430/new/

https://reviews.llvm.org/D100430