[PATCH] D100858: [AArch64][SVE] Allow generation of MOVPRFX for intrinsic nodes

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 21 05:56:04 PDT 2021


paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:353-355
+  defm MUL_ZPZZ   : sve_int_bin_pred_bhsd<AArch64mul_p, int_aarch64_sve_mul>;
+  defm SMULH_ZPZZ : sve_int_bin_pred_bhsd<AArch64smulh_p, int_aarch64_sve_smulh>;
+  defm UMULH_ZPZZ : sve_int_bin_pred_bhsd<AArch64umulh_p, int_aarch64_sve_umulh>;
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Are you sure this is safe?  The intrinsics have strict requirement regarding how inactive lanes are handled that I believe these patterns will not honour.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100858/new/

https://reviews.llvm.org/D100858



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