[PATCH] D100858: [AArch64][SVE] Allow generation of MOVPRFX for intrinsic nodes

[Bradley Smith via Phabricator via llvm-commits]

bsmith abandoned this revision.
bsmith added a comment.

The fact that the DestructiveBinary case in this needs to insert extra MOV's to make up for what is essentially poor register allocation choices, is less than ideal. I'm abandoning this in favour of a proper solution at a later date that will depend on D88595 <https://reviews.llvm.org/D88595>.



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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:353-355
+  defm MUL_ZPZZ   : sve_int_bin_pred_bhsd<AArch64mul_p, int_aarch64_sve_mul>;
+  defm SMULH_ZPZZ : sve_int_bin_pred_bhsd<AArch64smulh_p, int_aarch64_sve_smulh>;
+  defm UMULH_ZPZZ : sve_int_bin_pred_bhsd<AArch64umulh_p, int_aarch64_sve_umulh>;
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paulwalker-arm wrote:
> Are you sure this is safe?  The intrinsics have strict requirement regarding how inactive lanes are handled that I believe these patterns will not honour.
You are correct, this is being overzealous in what it covers.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100858/new/

https://reviews.llvm.org/D100858