[PATCH] D100858: [AArch64][SVE] Allow generation of MOVPRFX for intrinsic nodes

Bradley Smith via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 20 07:48:53 PDT 2021


bsmith created this revision.
bsmith added reviewers: paulwalker-arm, peterwaller-arm, joechrisellis, sdesmalen.
Herald added subscribers: psnobl, hiraditya, kristof.beyls, tschuett.
Herald added a reviewer: efriedma.
bsmith requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This patch does several things to achieve this:

- All patterns for destructive instructions with psuedos have been moved out of the main instruction multiclass and into the pseudo instruction multiclasses
- The pseudo instruction mutliclasses now contain patterns for both the ISD nodes and the intrinsic nodes.
- The set of pseudo instructions has been expanded in some cases to allow for a 'reverse' intrinsic (e.g. subr) to be reversed (e.g. into a sub), and to allow matching intrinsic nodes that don't have an ISD node equivalent.

As part of this patch missing patterns for the immediate versions of
UQSHL and SQSHL have been added. As well as support for DestructiveBinary
in AArch64ExpandPseudo::expand_DestructiveOp, which allows for expanding
pseudos where the operands cannot be swapped, (e.g. fscale, more will
follow).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100858

Files:
  llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith-movprfx.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-movprfx.ll
  llvm/test/CodeGen/AArch64/sve-intrinsics-shifts-movprfx.ll

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