[PATCH] D99367: [RISCV] When custom iseling masked loads/stores, copy the mask into V0 instead of virtual register.

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck accepted this revision.
frasercrmck added a comment.

LGTM too. I think helper functions would be interesting; I'd lean towards higher-level ones as you suggest. Otherwise it's a bit finicky with all the operands and returns going about the place.


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https://reviews.llvm.org/D99367