[PATCH] D99367: [RISCV] When custom iseling masked loads/stores, copy the mask into V0 instead of virtual register.

Hsiangkai Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 29 00:45:57 PDT 2021

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HsiangKai accepted this revision.
HsiangKai added a comment.
This revision is now accepted and ready to land.

LGTM.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D99367/new/

https://reviews.llvm.org/D99367

Previous message: [PATCH] D98994: NFC. Refactored DIPrinter for better support of new print styles.
Next message: [PATCH] D99367: [RISCV] When custom iseling masked loads/stores, copy the mask into V0 instead of virtual register.
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