[PATCH] D99026: [RISCV] Add isel pattern to optimize (mul (and X, 0xffffffff), (and Y, 0xffffffff)) on RV64

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D99026#2639787 <https://reviews.llvm.org/D99026#2639787>, @jrtc27 wrote:

> I think the final line of your commit message is the wrong way round?

Maybe it was poorly written. How does it look now?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D99026/new/

https://reviews.llvm.org/D99026