[PATCH] D98936: [RISCV] DAG nodes and pseudo instructions for CSR access
Serge Pavlov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 19 08:04:33 PDT 2021
sepavloff added a comment.
In D98936#2637079 <https://reviews.llvm.org/D98936#2637079>, @jrtc27 wrote:
> CSR addresses are uimm12s not simm12s
Changed to new uimm12.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.h:236
+ // the value read before the modification and the new chain pointer.
+ MODIFY_CSR,
+
----------------
jrtc27 wrote:
> Hm, modify isn't a great name when WRITE_CSR exists
Changed to swap.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D98936/new/
https://reviews.llvm.org/D98936
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