[PATCH] D98936: [RISCV] DAG nodes and pseudo instructions for CSR access

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

So to provide alternate scheduling information, we need scheduler predicates to inspect the operands to find the system register?

And what pass would be responsible for adding implicit def/use of the rounding mode register?


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https://reviews.llvm.org/D98936