[PATCH] D98801: [NFC][RISCV] Wrong stack slot for GPR and RVV spilled registers

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 18 08:04:34 PDT 2021


frasercrmck added a comment.

I'm wondering if the commit message should indicate it's adding a //test// for the issue (though I realise space is at a premium). I was a bit confused at first.



================
Comment at: llvm/test/CodeGen/RISCV/rvv/wrong-stack-slot-rv32.mir:21
+  ; CHECK-NEXT:    ret
+  {
+  entry:
----------------
nit: opening brace on a new line is a bit unusual?


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  https://reviews.llvm.org/D98801/new/

https://reviews.llvm.org/D98801



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