[PATCH] D98460: [RISCV] Add support for scalable vector masked load/store.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D98460#2622370 <https://reviews.llvm.org/D98460#2622370>, @frasercrmck wrote:

> In D98460#2622351 <https://reviews.llvm.org/D98460#2622351>, @craig.topper wrote:
>
>> I couldn’t find a combine in DAGCombiner.cpp. As far as I could tell they can only be generated by the type legalizer. I think the fractional LMUL types mean we never Promote any i8/i16/i32 types so we won’t create an extending load or truncating store.
>
> Fair enough, that's what I've seen with scatter/gather too.
>
> Anyway, LGTM. Do all-true masks get auto-optimized to regular loads (edit: or stores, obviously), even for scalable vectors?

Not yet. We need to migrate the code from using isBuildVectorAllZeros/Ones to the other function that considers splat_vector.


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