[PATCH] D98464: [GlobalISel] Add G_SBFX + G_UBFX (bitfield extraction opcodes)
    Matt Arsenault via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Thu Mar 11 17:40:30 PST 2021
    
    
  
arsenm added inline comments.
================
Comment at: llvm/include/llvm/Target/GenericOpcodes.td:1348
+  let OutOperandList = (outs type0:$dst);
+  let InOperandList = (ins type0:$src, unknown:$lsb, unknown:$width);
+  let hasSideEffects = false;
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These can be registers like a normal op. AMDGPU has registers/variable inputs for the offset and width
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98464/new/
https://reviews.llvm.org/D98464
    
    
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