[PATCH] D98464: [GlobalISel] Add G_SBFX + G_UBFX (bitfield extraction opcodes)

[Amara Emerson via Phabricator via llvm-commits]

aemerson added a comment.

If we have to allow variable width operands for these, it doesn't really help AArch64 that much. We have to match the constant pattern to a target specific opcode, and then lower the rest of these to shifts by default. I can see the benefit of AMDGPU, but with variable extracts this just puts us back where we started for AArch64.


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  https://reviews.llvm.org/D98464/new/

https://reviews.llvm.org/D98464