[PATCH] D98464: [GlobalISel] Add G_SBFX + G_UBFX (bitfield extraction opcodes)

[Jessica Paquette via Phabricator via llvm-commits]

paquette created this revision.
paquette added reviewers: aemerson, arsenm.
Herald added subscribers: dexonsmith, hiraditya, kristof.beyls, tpr, rovka.
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There is a bunch of similar bitfield extraction code throughout *ISelDAGToDAG.

E.g, ARMISelDAGToDAG, AArch64ISelDAGToDAG, and AMDGPUISelDAGToDAG all contain code that matches a bitfield extract from an and + right shift.

Rather than duplicating code in the same way, this adds two opcodes:

- G_UBFX (unsigned bitfield extract)
- G_SBFX (signed bitfield extract)

They work like this

  %x = G_UBFX %y, lsb, width

Where `lsb` and `width` are immediates denoting

- The least-significant bit of the extraction
- The width of the extraction

This will extract `width` bits from `%y`, starting at `lsb`. G_UBFX zero-extends the result, while G_SBFX sign-extends the result.

This should allow us to use the combiner to match the bitfield extraction patterns rather than duplicating pattern-matching code in each target.


https://reviews.llvm.org/D98464

Files:
  llvm/docs/GlobalISel/GenericOpcode.rst
  llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
  llvm/include/llvm/Support/TargetOpcodes.def
  llvm/include/llvm/Target/GenericOpcodes.td
  llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
  llvm/lib/CodeGen/MachineVerifier.cpp
  llvm/test/MachineVerifier/test_g_sbfx.mir
  llvm/test/MachineVerifier/test_g_ubfx.mir

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