[PATCH] D97480: [RISCV] Support inline asm for vector instructions.

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:8087
+  MVT RegVT = *TRI.legalclasstypes_begin(*RC);
+  if (RegVT.getSizeInBits() != RefOpInfo.ConstraintVT.getSizeInBits()) {
+    auto E = TRI.legalclasstypes_end(*RC);
----------------
Does this case trigger for any other target?

I'm curious: what made you choose this method in the end?


================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:8088
+  if (RegVT.getSizeInBits() != RefOpInfo.ConstraintVT.getSizeInBits()) {
+    auto E = TRI.legalclasstypes_end(*RC);
+    auto I = std::find_if(TRI.legalclasstypes_begin(*RC), E,
----------------
These clang-tidy warnings about `const auto *` look useful


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97480/new/

https://reviews.llvm.org/D97480