[PATCH] D97884: [dfsan] Remove hard-coded shadow width in more tests
George Balatsouras via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 3 14:23:00 PST 2021
gbalats added inline comments.
================
Comment at: llvm/test/Instrumentation/DataFlowSanitizer/external_mask.ll:10
; CHECK: and {{.*}}%[[RV:.*]]
-; CHECK: mul i64
%1 = load i32, i32* %b, align 4
----------------
stephan.yichao.zhao wrote:
> Is this one testing 2x for 16bit mode? This is still useful to lock down generated IR.
>
>
Exactly. That instruction won't be generated with 8bit mode, which is why I removed it so that the test can work in both modes in the future. If we want to keep it, do you have any suggestions on how to make it conditional (only when SBYTES != 1)?
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https://reviews.llvm.org/D97884/new/
https://reviews.llvm.org/D97884
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