[PATCH] D97884: [dfsan] Remove hard-coded shadow width in more tests
stephan.yichao.zhao via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 3 14:13:04 PST 2021
stephan.yichao.zhao added inline comments.
================
Comment at: llvm/test/Instrumentation/DataFlowSanitizer/external_mask.ll:10
; CHECK: and {{.*}}%[[RV:.*]]
-; CHECK: mul i64
%1 = load i32, i32* %b, align 4
----------------
Is this one testing 2x for 16bit mode? This is still useful to lock down generated IR.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D97884/new/
https://reviews.llvm.org/D97884
More information about the llvm-commits
mailing list