[PATCH] D97698: [RISCV] Support fixed-length INSERT_VECTOR_ELT

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll:13
+; RV32-NEXT:    vle64.v v26, (a0)
+; RV32-NEXT:    vsetvli a3, zero, e64,m2,ta,mu
+; RV32-NEXT:    vmv.v.x v28, a2
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Should this also be 4 instead of VLMAX?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97698/new/

https://reviews.llvm.org/D97698