[PATCH] D97274: [RISCV] replace unuseful emergency spill slot test with a mir test

[luxufan via Phabricator via llvm-commits]

StephenFan added a comment.

In D97274#2593601 <https://reviews.llvm.org/D97274#2593601>, @rogfer01 wrote:

> Isn't this very similar to https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir except for a missing `SD`?

Yes, I referenced this out-of-reach-emergency-slot.mir test. But with a stack object that has a out-of-range size. And I think my use-emergency-spill-slot.mir test and out-of-reach-emergency-slot.mir test are a little repeated. So should I keep my use-emergency-spill-slot.mir test or delete it?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97274/new/

https://reviews.llvm.org/D97274