[PATCH] D97268: [X86] Use correct padding when in 16-bit mode

[Bill Wendling via llvm-commits]

On Thu, Feb 25, 2021 at 12:22 PM Craig Topper via Phabricator
<reviews at reviews.llvm.org> wrote:
>
> craig.topper added inline comments.
>
>
> ================
> Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:1079
>      return 1;
> +  if (STI.getFeatureBits()[X86::Mode16Bit])
> +    return 4;
> ----------------
> Should this just be above the NOPL check if we're going to AND NOPL with !STI.hasFeature(X86::Mode16Bit).
>
> Should we consistently use hasFeature in this function instead of mixing with getFeatureBits()?
>
>
I was told to move it here. I'm only following orders to get this
patch approved. I thought the original patch was just fine, so I'm not
qualified to say it should go to its original position. James?

================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:1076
 unsigned X86AsmBackend::getMaximumNopSize() const {
+  if (STI.getFeatureBits()[X86::Mode16Bit])
+    return 4;
----------------
Needs to move below the FeatureNOPL stanza.

-bw