[PATCH] D97268: [X86] Use correct padding when in 16-bit mode
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 25 12:22:31 PST 2021
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:1079
return 1;
+ if (STI.getFeatureBits()[X86::Mode16Bit])
+ return 4;
----------------
Should this just be above the NOPL check if we're going to AND NOPL with !STI.hasFeature(X86::Mode16Bit).
Should we consistently use hasFeature in this function instead of mixing with getFeatureBits()?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D97268/new/
https://reviews.llvm.org/D97268
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