[PATCH] D97276: [CodeGen] Canonicalise adds of i1 vectors using XOR

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 23 09:45:36 PST 2021


craig.topper added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:5312
       return N1;
+    if (Opcode == ISD::ADD && VT.isVector() &&
+        VT.getVectorElementType() == MVT::i1)
----------------
Isn't this also possible for sub?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97276/new/

https://reviews.llvm.org/D97276



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