[PATCH] D97276: [CodeGen] Canonicalise adds of i1 vectors using XOR

[David Sherwood via Phabricator via llvm-commits]

david-arm created this revision.
david-arm added reviewers: sdesmalen, kmclaughlin, craig.topper.
Herald added subscribers: pengfei, hiraditya, kristof.beyls.
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When calling SelectionDAG::getNode() to create an ADD of two
vectors with i1 element types we can canonicalise this to
use XOR instead, where 1+1 is treated as wrapping around
to 0.

I've added the following tests for SVE targets:

  CodeGen/AArch64/sve-pred-arith.ll

and modified some X86 tests to reflect the much simpler codegen
required.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97276

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/AArch64/sve-pred-arith.ll
  llvm/test/CodeGen/X86/avx512-mask-op.ll
  llvm/test/CodeGen/X86/avx512bw-mask-op.ll

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