[PATCH] D97194: [RISCV] Support fixed-length vector sign/zero extension
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 23 03:23:35 PST 2021
frasercrmck updated this revision to Diff 325728.
frasercrmck marked an inline comment as done.
frasercrmck added a comment.
- rebase
- address review feedback: grab container from extended type
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D97194/new/
https://reviews.llvm.org/D97194
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D97194.325728.patch
Type: text/x-patch
Size: 15141 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210223/73ad1281/attachment.bin>
More information about the llvm-commits
mailing list