[PATCH] D96980: [amdgpu] Revert agnostic SGPR spill.

[Carl Ritson via Phabricator via llvm-commits]

critson added a comment.

Is it at all possible to encapsulate your failure case in a lit test?

Is the problem not with the exec manipulation, but really that the register scavenger choosing an inappropriate register, w.r.t. wave level CFG?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96980/new/

https://reviews.llvm.org/D96980