[PATCH] D96980: [amdgpu] Revert agnostic SGPR spill.

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

> HPC workloads mostly spill 1 or 2 SGPRs.

Can you explain this a bit more? Spilling SGPRs //to memory// is supposed to be a very rare case. Why is it common for HPC workloads? Is there a better way to fix it?


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https://reviews.llvm.org/D96980