[PATCH] D95878: [AMDGPU]: Fixes an invalid clamp selection pattern.

[Thomas Symalla via Phabricator via llvm-commits]

tsymalla added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp:74
   // Try to match a combination of min / max MIR opcodes.
-  if (mi_match(MI.getOperand(1).getReg(), MRI, m_GSMin(m_Reg(Base), m_ICst(MatchInfo.Cmp1)))) {
-    if (!mi_match(Base, MRI, m_GSMax(m_Reg(MatchInfo.Origin), m_ICst(MatchInfo.Cmp2)))) {
-      return false;
-    }
+  bool continueMatch =
+      mi_match(MI.getOperand(1).getReg(), MRI,
----------------
arsenm wrote:
> I don't see why you need to uglify this. Can't you just reset MatchInfo before the second matcher?
The problem is: in the current implementation, if both of the matches fail, there is a fallthrough. If there is no min or max following the trunc (see the test case), the match will continue. I want to make sure at least one case exists. That's why I am double-checking here. 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95878/new/

https://reviews.llvm.org/D95878