[PATCH] D95878: [AMDGPU]: Fixes an invalid clamp selection pattern.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp:74
   // Try to match a combination of min / max MIR opcodes.
-  if (mi_match(MI.getOperand(1).getReg(), MRI, m_GSMin(m_Reg(Base), m_ICst(MatchInfo.Cmp1)))) {
-    if (!mi_match(Base, MRI, m_GSMax(m_Reg(MatchInfo.Origin), m_ICst(MatchInfo.Cmp2)))) {
-      return false;
-    }
+  bool continueMatch =
+      mi_match(MI.getOperand(1).getReg(), MRI,
----------------
I don't see why you need to uglify this. Can't you just reset MatchInfo before the second matcher?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95878/new/

https://reviews.llvm.org/D95878