[PATCH] D95136: [X86] Fix tile config register spill issue.
LuoYuanke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 28 05:00:30 PST 2021
LuoYuanke added inline comments.
================
Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:252
+ IsCallBeforeAMX = true;
+ LastCallMayHasAMX = &*MII;
+ }
----------------
What about multi call and multi AMX in one BB? For below example, should we insert ldtilecfg after call1?
call1
AMX1
call2
AMX2
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95136/new/
https://reviews.llvm.org/D95136
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