[PATCH] D94903: [RISCV] Implement vlxseg intrinsics.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 20 21:49:19 PST 2021

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craig.topper added a comment.

Does this need earlyclobber? The spec says "For vector indexed segment loads, the destination vector register groups cannot overlap the source vector register group (speci

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