[PATCH] D94940: [RISCV] Implement vsxseg intrinsics.
Hsiangkai Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 19 19:03:45 PST 2021
HsiangKai updated this revision to Diff 317753.
HsiangKai added a comment.
Add test cases for rv32. It does not contain all combinations for vsxseg due to the revision will be too large to upload.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D94940/new/
https://reviews.llvm.org/D94940
Files:
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/vsxseg-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vsxseg-rv64.ll
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