[PATCH] D94940: [RISCV] Implement vsxseg intrinsics.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 20 21:47:22 PST 2021


craig.topper added inline comments.


================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:998
     defm vssseg # nf : RISCVSSegStore<nf>;
+    // In v1.0, it should be vsoxseg.
+    defm vsxseg # nf : RISCVISegStore<nf>;
----------------
Make this a FIXME or TODO


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:2834
 defm PseudoVSSSEG : VPseudoSSegStore;
+// In v1.0, it should be PseudoVSOXSEG.
+defm PseudoVSXSEG : VPseudoISegStore;
----------------
Make this a FIXME or TODO


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94940/new/

https://reviews.llvm.org/D94940



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