[PATCH] D94940: [RISCV] Implement vsxseg intrinsics.

[Hsiangkai Wang via Phabricator via llvm-commits]

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Define vsxseg intrinsics and pseudo instructions. Lower vsxseg
intrinsics to pseudo instructions in RISCVDAGToDAGISel.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D94940

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vsxseg.ll