[PATCH] D90853: [RISCV] Add DAG nodes to represent read/write CSR

Serge Pavlov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Jan 9 22:27:26 PST 2021


sepavloff added a comment.

In D90853#2482536 <https://reviews.llvm.org/D90853#2482536>, @rogfer01 wrote:

> Hi Serge, would it make sense to use a `Pseudo` for those specific cases with a custom inserter? (`usesCustomInserter = 1` in the tablegen definition of the `Pseudo`)
>
> This way you could have `PseudoCSRW` and `PseudoCSRWI` (it looks to me you do not need the other cases, did I get that right?) that you can use in the patterns. Then you can expand them to the existing MachineInstructions `CSRRW`, `CSRRWI`, respectively (hope I didn't get the names wrong), that use `X0` as the destination register in `RISCVTargetLowering::EmitInstrWithCustomInserter`.

You describe how to make X0 an output register. I agree, it look like using custom inserter is the only way to make such instruction. This way is substantially more complex than just adding 3 new auxiliary instructions. But not complexity is the main concern.

Making X0 an output register contradicts with design of both DAG and MIR. DAG node and MachineInstr behave as functions, they have clear distinction of input and output operands. Even if a register is both input and output, it is represented by two operands. Functional nature of DAG and MIR is used in many cases, where use-def chains are examined, like lifetime analysis or loop invariant movement. Adding "definitions" for register that is immutable would break the functional nature and might require multiple changes in various parts of compiler.

> I understand your concern with `X0` potentially defining a false write dependency, but I too understand that we should fix any case in LLVM where constant registers are not handled correctly.

It creates also true dependencies, any use of `X0` after CSR write would depend on the latter. For example, if a loop contains an invariant expression that uses `X0`, it would not be moved if the loop contains CSR write.

Using `X0` as output is just a trick to have a new instruction without spending opcode. Actually such instruction does not define `X0`. What is the benefit of exposing this low-level encoding feature in high-level structures?


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