[PATCH] D90853: [RISCV] Add DAG nodes to represent read/write CSR
    Craig Topper via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Sat Jan  9 22:52:07 PST 2021
    
    
  
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:565
+def CSRW  : CSRW_ir<0b001, "csrw">;
+def CSRS  : CSRW_ir<0b010, "csrs">;
+def CSRC  : CSRW_ir<0b011, "csrc">;
----------------
There is no write only version of CSRS/CSRC/CSRSI/CSRCI. There's a read/write and read only version of those.
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90853/new/
https://reviews.llvm.org/D90853
    
    
More information about the llvm-commits
mailing list