[PATCH] D94163: [RISCV] Set dependency on floating point CSRs, 1/3

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

I still don't understand why the existence of static rounding modes in the ISA requires that we have to use them for the default environment. X86 doesn't have static rounding mode prior to AVX512 so uses dynamic in the default mode.

Do any other targets create 3 variants of instructions like this? X86 definitely doesn't. What makes RISC-V special that it needs to go this extreme?


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https://reviews.llvm.org/D94163