[PATCH] D94163: [RISCV] Set dependency on floating point CSRs, 1/3

[Serge Pavlov via Phabricator via llvm-commits]

sepavloff added a comment.

In D94163#2482528 <https://reviews.llvm.org/D94163#2482528>, @craig.topper wrote:

> I still don't understand why the existence of static rounding modes in the ISA requires that we have to use them for the default environment. X86 doesn't have static rounding mode prior to AVX512 so uses dynamic in the default mode.

It is more convenient. Instructions with static rounding mode do not depend on `frm` so they may be scheduled more freely. Besides function with static only FP instructions may be safely called from non-default FP environment. Targets without static rounding mode don't have such possibility.

> Do any other targets create 3 variants of instructions like this? X86 definitely doesn't. What makes RISC-V special that it needs to go this extreme?

It must be a target that supports both static and dynamic rounding mode. Are there other targets in officially llvm repository that support both of them?


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