[PATCH] D93750: [RISCV] Frame handling for RISC-V V extension.
luxufan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 23 20:17:48 PST 2020
StephenFan added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:547
const RISCVRegisterInfo *RI = STI.getRegisterInfo();
- if (RI->needsStackRealignment(MF)) {
+ if (RI->needsStackRealignment(MF) && !MFI.hasScalableVectorObjects()) {
Align MaxAlignment = MFI.getMaxAlign();
----------------
why if the machine function has the scalable vector objects, then the prolog doesn't need to realign the stack address ?
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D93750/new/
https://reviews.llvm.org/D93750
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