[PATCH] D93707: [FPEnv] Allow fneg + strict_fsub -> strict_fadd in DAGCombiner

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:13416
+    return DAG.getNode(ISD::STRICT_FADD, DL, DAG.getVTList(VT, ChainVT),
+                       {Chain, N0, NegN1}, Flags);
+
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craig.topper wrote:
> Can we use SelectionDAG::FlagInserter like visitFSUB instead of passing Flags?
+1


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Comment at: llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll:1062
 define <1 x float> @constrained_vector_fsub_v1f32() #0 {
+; PC64LE:       # float -1
 ; PC64LE-LABEL: constrained_vector_fsub_v1f32:
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Was this added by update_llc_test_checks.py ? I'm worried if someone comes along and regenerates it we'll lose this line - what about moving it above the define (update_llc_test_checks.py shouldn't touch it then).


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Comment at: llvm/test/CodeGen/X86/strict-fsub-combines.ll:1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+
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pre-commit this test file with current codegen and use update_llc_test_checks.py


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93707/new/

https://reviews.llvm.org/D93707