[PATCH] D93708: [AMDGPU] Add a new Clamp Pattern to the GlobalISel Path.

[Thomas Symalla via Phabricator via llvm-commits]

tsymalla created this revision.
tsymalla added reviewers: nhaehnle, tpr, dstuttard, Flakebi.
tsymalla added a project: AMDGPU.
Herald added subscribers: kerbowa, hiraditya, t-tye, rovka, yaxunl, jvesely, kzhuravl, arsenm.
tsymalla requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

This patch should find a pattern in GlobalISel / AMDGPUPostLegalizerCombiner which can appear when trying to clamp 64-bit values to short values without truncation, for example by using the 64-bit / 16-bit integer extensions in shaders. This pattern can be reduced to two VALU instructions:

v_cvt_pk_i16_i32_e64 v0, v0, v1 ; where v[0:1] is a 64-bit number
v_med3_i32 v0, LowBoundary, v0, HighBoundary ; where LowBoundary >= SHORT_MII, HighBoundary <= SHORT_MAX

I am open for suggestions and reviews as this is my first change on the LLVM compiler.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93708

Files:
  llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
  llvm/lib/Target/AMDGPU/AMDGPUCombine.td
  llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/clampi64toi16.ll

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